The invention relates to reproduction machines, and more particularly, to a system for diagnosing and identifying faults.
Reproduction machines may incorporate a distributed processing system in which a number of core processors are used to handle and distribute operating control data to the various operating components of the machine. In that type of system, in addition to the core processors, there is usually a plurality of local or input/output processors interfacing their respective core processors with the machine components.
Typically, such core processors have on-board memory to which a portion of the operating system software is downloaded for machine operation. The operating system software is normally resident in the machine main memory and transferred to the core processors on start up of the machine. The processors themselves are in the form of Printed Wiring Boards (PWBs) located at convenient points within the machine and coupled to the machine memory store by a suitable line or bus. Similarly, the input/output processors are coupled to their respective core processors and each other by local buses.
The core processors have numerous operating states such as running, downloading, receiving/transmitting messages, failed, etc. Because of this, it is often difficult to tell what state a processor is in at any given moment should there be a problem or fault. This in turn makes it difficult to debug faults in the system, and particularly in the core processors themselves since it is difficult to isolate the particular processor at fault and having done that, to identify the particular fault. The problem is exacerbated by the fact that most faults are transient in nature requiring that the fault detector be under surveillance at the instant the fault occurs.
The prior art has addressed fault detection in a number of different ways as, for example, shown in U.S. Pat. No. 4,665,519 to Kirchner et al. There, a computer data transmission system with modems provides a network. To assure transmission of data, the data is sent in packets, each with validation bits. On receipt, the station receiving the data checks to see if the packet is correct and if so, sends an acknowledgment signal. If the data is not correct, no acknowledgment is sent and in response to a failure to receive an acknowledgment, the transmitting station retransmits the packet. If the packet cannot be validated after a selected number of transmissions, a fault is declared. Another arrangement is disclosed by U.S. Pat. No. 4,710,929 to Kelly et al where a modem is provided with display having a panel of Light Emitting Diodes (LEDs). In Kelly et al, the LEDs are illuminated in response to a particular data carrier detect signal to indicate that the modem is in use. Yet another system is disclosed by U.S. Pat. No. 4,580,274 to Debany, Jr. et al wherein a transceiver test device analyzing transient waveforms through comparison with pre-stored waveforms is provided. A panel of uniquely assigned LEDs on the device are illuminated in the event the waveform is incorrect. And U.S. Pat. No. 3,585,629 to Baynard provides a lamp array for displaying the contents of computer storage registers during servicing. In order to enable the user to distinguish different words at each of the bit positions being examined, the power source for the lamps of the array provides different lamp illumination levels ranging from dim to bright to flickering.